TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

ID versus VDS curves of TM DSG SiNT MOSFET with

I-V curves for Non-graded base SiGe HBT

Effect of 3 nm gate length scaling in junctionless double

Modelled and experimental Hall voltage response in vertical Hall

Effect of 3 nm gate length scaling in junctionless double

Comparison between the current in a Ge quantum-well diode

IG vs VGS curves with Ta and W as metal gates for In0.53Ga0.47As

ION/IOFF ratio comparison of this work with reports in literature

TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

Photo-generation Rate generated in the model.

TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

Schematic of the real-space representation of an electron device